{"slug": "yosys", "name": "Yosys", "category": "other", "category_name": "Other software", "description": "", "recommenders": 3, "commenters": 3, "warners": 0, "score": 2.743, "rising": 1.67, "first": "2025-12-22", "latest": "2026-09-04", "why": "Yosys is a super lightweight open-source FPGA toolchain that really easy to get up and running.", "why_is_quote": true, "has_verdict": false, "sentiment": {"recommend": 3, "neutral": 1, "compare": 0, "warn": 0}, "spark": [0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0], "listed": true, "loved": [], "caveat": "", "short_quote": "Yosys is a super lightweight open-source FPGA toolchain that really easy to get up and running.", "icon": false, "domain": null, "github_repo": null, "official_url": "https://yosyshq.net/yosys/", "pricing": "", "aliases": ["Yosys"], "verdict": null, "praise": [{"label": "", "summary": "", "quotes": [{"id": 793010641, "item_id": 49563165, "url": "https://news.ycombinator.com/item?id=49563165", "by": "BalistaCRATZ", "date": "2026-09-04", "stance": "recommend", "quote": "yosys has support for doing \u201cassertion checking\u201d, which I used in my solution", "excerpt": "Nice! I ended up using the KLayout Python API to parse the GDS and extract the netlist, which was actually quite nice to use. Also, yosys has support for doing \u201cassertion checking\u201d, which I used in my solution: https://sunaabh.com/systems/2026/08/18/jspuzzle.html", "context": "", "use_case": "assertion checking", "switched_from": "", "story": "Solving the Jane Street reverse engineering challenge"}, {"id": 791033200, "item_id": 49439575, "url": "https://news.ycombinator.com/item?id=49439575", "by": "dlcarrier", "date": "2026-08-25", "stance": "recommend", "quote": "Yosys is a super lightweight open-source FPGA toolchain that really easy to get up and running.", "excerpt": "I highly recommend getting a small, cheap FPGA development board with something supported by Yosys, like a Latice ICE40UP5k, Efinix T8F81C2, or GOWIN GW1NR-9. Yosys is a super lightweight open-source FPGA toolchain that really easy to get up and running. The FPGA models I mentioned have ~5k to ~10k LUTs, can all support simple RISC-V processors, and have built-in memory and DSPs.", "context": "", "use_case": "FPGA development", "switched_from": "", "story": "SiFive's First Server Platform"}, {"id": 741781248, "item_id": 46361328, "url": "https://news.ycombinator.com/item?id=46361328", "by": "malmeloo", "date": "2025-12-22", "stance": "recommend", "quote": "There already exist fantastic open source tools such as Yosys, Nextpnr, iverilog, OpenFPGALoader", "excerpt": "One big issue with FPGAs is how annoying it is to learn how to use them. I did a course on embedded systems a few years ago and nobody could truly get to enjoy it because we spent most of our time downloading and installing huge toolchains, waiting for synthesis and PnR to complete and debugging weird IDE issues. We need to open up the space to allow people to develop better solutions than what these companies are fo", "context": "", "use_case": "FPGA synthesis", "switched_from": "", "story": "FPGAs Need a New Future"}]}], "caveats": [], "who": [], "tags": [], "use_cases": ["assertion checking", "fpga development", "fpga synthesis from command line", "fpga synthesis"], "compared": [], "makers": [], "threads": [{"url": "https://news.ycombinator.com/item?id=49562657", "title": "Solving the Jane Street reverse engineering challenge", "mentions": 1}, {"url": "https://news.ycombinator.com/item?id=49428638", "title": "SiFive's First Server Platform", "mentions": 1}, {"url": "https://news.ycombinator.com/item?id=49023076", "title": "Show HN: Write, simulate and synthesize VHDL/Verilog in the browser", "mentions": 1}, {"url": "https://news.ycombinator.com/item?id=46324269", "title": "FPGAs Need a New Future", "mentions": 1}], "sentiment_by_month": {"2025-11": {}, "2025-12": {"recommend": 1}, "2026-01": {}, "2026-02": {}, "2026-03": {}, "2026-04": {}, "2026-05": {}, "2026-06": {}, "2026-07": {"neutral": 1}, "2026-08": {"recommend": 1}, "2026-09": {"recommend": 1}, "2026-10": {}}, "quotes": [{"id": 793010641, "item_id": 49563165, "url": "https://news.ycombinator.com/item?id=49563165", "by": "BalistaCRATZ", "date": "2026-09-04", "stance": "recommend", "quote": "yosys has support for doing \u201cassertion checking\u201d, which I used in my solution", "excerpt": "Nice! I ended up using the KLayout Python API to parse the GDS and extract the netlist, which was actually quite nice to use. Also, yosys has support for doing \u201cassertion checking\u201d, which I used in my solution: https://sunaabh.com/systems/2026/08/18/jspuzzle.html", "context": "", "use_case": "assertion checking", "switched_from": "", "story": "Solving the Jane Street reverse engineering challenge"}, {"id": 791033200, "item_id": 49439575, "url": "https://news.ycombinator.com/item?id=49439575", "by": "dlcarrier", "date": "2026-08-25", "stance": "recommend", "quote": "Yosys is a super lightweight open-source FPGA toolchain that really easy to get up and running.", "excerpt": "I highly recommend getting a small, cheap FPGA development board with something supported by Yosys, like a Latice ICE40UP5k, Efinix T8F81C2, or GOWIN GW1NR-9. Yosys is a super lightweight open-source FPGA toolchain that really easy to get up and running. The FPGA models I mentioned have ~5k to ~10k LUTs, can all support simple RISC-V processors, and have built-in memory and DSPs.", "context": "", "use_case": "FPGA development", "switched_from": "", "story": "SiFive's First Server Platform"}, {"id": 784420548, "item_id": 49026284, "url": "https://news.ycombinator.com/item?id=49026284", "by": "dlcarrier", "date": "2026-07-23", "stance": "neutral", "quote": "I've ended up using Yosys from a command line, while editing the files in a text editor.", "excerpt": "I used to think EDA tools for FPGAs were the absolute worst development environment, until I wanted to modify an open-source application on my phone, and tried to install and run Android Studio. It manages to out bloat both Vivado and Quartus. At least I wouldn't need to buy a special computer to run it, like the Xcode development environment for iOS. I've ended up using Yosys from a command line, while editing the f", "context": "", "use_case": "FPGA synthesis from command line", "switched_from": "Vivado", "story": "Show HN: Write, simulate and synthesize VHDL/Verilog in the browser"}, {"id": 741781248, "item_id": 46361328, "url": "https://news.ycombinator.com/item?id=46361328", "by": "malmeloo", "date": "2025-12-22", "stance": "recommend", "quote": "There already exist fantastic open source tools such as Yosys, Nextpnr, iverilog, OpenFPGALoader", "excerpt": "One big issue with FPGAs is how annoying it is to learn how to use them. I did a course on embedded systems a few years ago and nobody could truly get to enjoy it because we spent most of our time downloading and installing huge toolchains, waiting for synthesis and PnR to complete and debugging weird IDE issues. We need to open up the space to allow people to develop better solutions than what these companies are fo", "context": "", "use_case": "FPGA synthesis", "switched_from": "", "story": "FPGAs Need a New Future"}]}